Maxim Integrated DS4830A Optical Microcontroller - Manual (Page 153)

DS4830A User’s Guide
153
18.5.2 – Multiplier Operand A Register (MA)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name MA[15:0]
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Multiplier Operand A: This operand A register is used by the application code to load 16-bit values for multiplier operations.
18.5.3 – Multiplier Operand B Register (MB)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name MB[15:0]
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Multiplier Operand B: This operand B register is used by the application code to load 16-bit values for multiplier operations.
18.5.4 – Multiplier Accumulator 2 Register (MC2)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name MC2[15:0]
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Multiplier Accumulator 2 Register: The MC2 register represents the two most significant bytes of the accumulator register. The
48-bit accumulator is formed by MC2, MC1 and MC0. For a signed operation, the most significant bit of this register is the sign bit.
18.5.5 – Multiplier Accumulator 1 Register (MC1)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name MC1[15:0]
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Multiplier Accumulator 1 Register: The MC1 register represents bytes 3 and 2 of the accumulator register. The 48-bit
accumulator is formed by MC2, MC1, and MC0.
18.5.6 – Multiplier Accumulator 0 Register (MC0)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name MC0[15:0]
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Multiplier Accumulator 0 Register: The MC0 register represents the two least significant bytes of the accumulator register. The
48-bit accumulator is formed by MC2, MC1, and MC0.
18.5.7 – Multiplier Read Register 1 (MC1R)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name MC1R[15:0]
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Multiplier Read Register 1: The MC1R register represents bytes 3 and 2 from the result of the last operation when MCW = 1 or
the last operation was a multiply or multiply-negate. When MCW = 0 and the last operation was a multiply-accumulate/subtract,
the contents of this register may or may not agree with the contents of MC1 due to the combinatorial nature of the adder. The
content of this register may change if MCNT, MA, MB, or MC[2:0] is changed.
18.5.8 – Multiplier Read Register 0 (MC0R)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name MC0R[15:0]
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Multiplier Read Register 0: The MC1R register represents bytes 1 and 0 from the result of the last operation when MCW = 1 or
the last operation was a multiply or multiply-negate. When MCW = 0 and the last operation was a multiply-accumulate/subtract,
the contents of this register may or may not agree with the contents of MC0 due to the combinatorial nature of the adder. The
content of this register may change if MCNT, MA, MB or MC[2:0] is changed.