Samsung S3F401F - Manual (Page 260)

UART S3F401F_UM_REV1.00
12-22
UART Functional Baud Rate Register UARTFBRD (0x028) Access: Read/Write
31 30 29 28 27 26 25 24
− − − − − − − −
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
23 22 21 20 19 18 17 16
− − − − − − − −
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
15 14 13 12 11 10 9 8
− − − − − − − −
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
7 6 5 4 3 2 1 0
−
−
DIVFRAC[5:0]
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
W: Write R: Read -0: 0 After reset -1: 1 After reset -U: Undefined after reset
DIVFRAC Baud Rate Selection Field
The fractional baud rate divisor. These bits are cleared to 0 on reset.
NOTE: The contents of the UARTIBRD and UARTFBRD registers are not updated until transmission or reception of the
current character is complete. The minimum divide ratio possible is 1 and the maximum is 65535. That is, UARTIBRD
= 0 is invalid and UARTFBRD is ignored when this is the case. Similarly, when UARTIBRD = 65535 (that is 0xFFFF),
then UARTFBRD must not be greater than zero. If this is exceeded it results in an aborted transmission or reception.
FRACTIONAL BAUD RATE REGISTER (UARTFBRD)
The UARTFBRD register is the fractional part of the baud rate divisor value. All the bits are cleared to 0 on rest.
The baud rate divisor is calculated as follows:
Baud rate divisor BAUDDIV = (F
PCLK
/ (16 x Baud rate))
Where F
PCLK
is the UART reference clock frequency.
The BAUDDIV is comprised of the integer value (BAUD DIVINT) and the fractional value (BAUD DIVFRAC).
Example of calculating the divisor value
If the required baud rate is 230400 and PCLK = 4MHz then:
Baud Rate Diviser = (4 x 10
6
) / (16 x 230400) = 1.085
Therefore, BRD
I
= 1 and BRD
F
= 0.085
Therefore, fractional part, m = integer((0.085 x 64) + 0.5) = 5
Generated baud rate divider = 1 + 5/64 = 1.078
Generated baud rate = (4 x 10
6
) / (16 x 1.078) = 231911
Error = (231911 – 230400) / 230400 x 100 = 0.656%