Samsung S3F401F - Manual (Page 180)

S3F401F_UM_REV1.00 I/O PORTS
8-31
PORT2 Data Status Register PDATSTAT2 (0x04C) Access: Read Only
31 30 29 28 27 26 25 24
− − − − − − − −
R-U R-U R-U R-U R-U R-U R-U R-U
23 22 21 20 19 18 17 16
− − − − − − − −
R-U R-U R-U R-U R-U R-U R-U R-U
15 14 13 12 11 10 9 8
−
P2.14 P2.13 P2.12 P2.11 P2.10 P2.9 P2.8
R-U R-U R-U R-U R-U R-U R-U R-U
7 6 5 4 3 2 1 0
P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0
R-U R-U R-U R-U R-U R-U R-U R-U
W: Write R: Read -0: 0 After reset -1: 1 After reset -U: Undefined after reset
P2.[14:0] Port 2 Output Data Status Bit
0 = The real level of corresponding pin is at logic 0.
1 = The real level of corresponding pin is at logic 1.
Values read from the address of this register reflect the external state of port 2 not the value
written to this register. Even though the port is configured as a functional pin except ADC, user
can know the external state of port 2 by reading this register.