Pin assignments, S3f401f – Samsung S3F401F User Manual
Page 18
PRODUCT OVERVIEW
S3F401F_UM_REV1.00
1-4
4. PIN ASSIGNMENTS
S3F401F
(100-QFP-1420C)
PLL
VSSI
P
VDD
IO2
PLL
V
DD
CO
RE
PLL
VSSCORE
PLL
C
A
P
Xout
Xin
RTCK
TMS
TD
I
TC
K
TD
O
nTRST
ADC
V
SSIO
A
D
CV
DD
IO
P2.
14/AIN
1
4
P2.
13/AIN
1
3
P2.12/AIN12
P1.5/T3CAP/INT5
P1.6/T3PWM/INT6
MD2
MD1
MD0
P1.7
/T4C
L
K
/INT7
P1.8
/T4CAP/INT8
P1
.9/T4PW
M
/I
N
T
9
P1
.10/T5CLK/INT1
0
P1.
11/P5
C
A
P/INT
1
1
P1.12
/T5PWM
/INT12
P1.1
3/SSP
TX
D
0
/IN
T
1
3
P1.
14/SS
PRXD
0
/INT1
4
P
1
.15
/SSPCLK
0/INT
1
5
P
1
.16
/SSPF
SS
0/INT
1
6
VDDO
U
T
VS
SIP
VDD
C
ORE1
VSSCORE1
P2.11/AIN11
P2.10/AIN10
P2.9/AIN9
P2.8/AIN8
P2.7/AIN7
P2.6/AIN6
P2.5/AIN5
P2.4/AIN4
P2.3/AIN3
P2.2/AIN2
P2.1/AIN1
P2.0/AIN0
VSSCORE2
VDDCORE2
VDDIO
1
VSS
IO1
P1.30/PWM1D2/INT30
P1.29/PWM1U2/INT29
P1.28/PWM1D1/INT28
P1.27/PWM1U1/INT27
P1.26/PWM1D0/INT26
P1.25/PWM1U0/INT25
P1.24/PWM1OFF/INT24
P1.23/PHASEZ1/INT23
P1.22/PHASEB1/INT22
P1.21/PHASEA1/INT21
P1.20/SSPFSS1/INT20
P1.19/SSPCLK1/INT19
P1.18/SSPRXD1/INT18
P1.17/SSPTXD1/INT17
PLL
V
DD
OUT
nRESE
T
P0.0/T0CLK
P0.1/T0CAP
P0.2/T0PWM
P0.3/T1CLK
P0.4/T1CAP
P0.5/T1PWM
P0.6/T2CLK
P0.7/T2CAP
P0.8/T2PWM/ADTRG
P0.9/PHASEA0
P0.10/PHASEB0
P0.11/PHASEZ0
P0.12/PWM0OFF
P0.13/PWM0U0
P0.14/PMW0D0
P0.15/PMW0U1
P0.16/PWM0D1
P0.17/PWM0U2
P0.18/PMW0D2
VSS
IO0
VDDIO
0
VDDCORE0
VSSCORE0
P1.0/UARTRXD0/INT0
P1.1/UARTTXD0/INT1
P1.2/UARTRXD1/INT2
P1.3/UARTTXD1/INT3
P1.4/T3CLK/INT4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
ADC
V
SSCORE
A
D
CV
DD
C
O
RE
VSS
IO2
Figure 1-2. S3F401F Package Pin Assignments (100-QFP-1420)