Samsung S3F401F - Manual (Page 143)

S3F401F_UM_REV1.00 INTERRUPT CONTROLLER
7-19
INTERRUPT OFFSET Register for FIQ INTOFFSFIQ (0x028) Access: Read Only
31 30 29 28 27 26 25 24
− − − − − − − −
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
23 22 21 20 19 18 17 16
− − − − − − − −
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
15 14 13 12 11 10 9 8
− − − − − − − −
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
7 6 5 4 3 2 1 0
− INTOFFSFIQDAT [6:0]
R-0 R-1 R-1 R-1 R-1 R-1 R-1 R-1
W: Write R: Read -0: 0 After reset -1: 1 After reset -U: Undefined after reset
Each Interrupt Type Selection Bit INTOFFSFIQDAT
The value of this register represents the interrupt source number to be serviced which
was set to FIQ service in the INTMOD register. This register is set when the bit of
INTPND register is set to “1” and is cleared when the bit of INTPND register is set to “0”