Programming considerations – Echelon I/O Model Reference for Smart Transceivers and Neuron Chips User Manual

Page 25

I/O Model Reference

The total latency for a particular function call, from start to end, has two

separate parts:

• Processing time required before the actual hardware I/O update (read or

write) occurs

• The time required to finish the current function call and return to the

application program

Overall accuracy is always related to the accuracy of the clock in (CLK1 or XIN)
input of the Neuron Chip or Smart Transceiver. Timing diagrams are provided

for all non-trivial cases to clarify the parameters given.

Programming Considerations

Before performing I/O, you must first declare the I/O objects that monitor and

control the 11 or 12 Neuron Chip or Smart Transceiver I/O pins, named IO0, IO1,

..., IO11. By default, any undeclared pin is unused, and is deactivated. In the
deactivated state, the pin is in a high-impedance state. The declaration syntax

for I/O objects is described in detail in subsequent chapters of this manual.
Note: Unused

input

pins must have pull-up resistors. For Series 3100 devices,

you can use the enable_io_pullups compiler directive for pins IO4 through IO7

(see the

Compiler Directives

chapter of the

Neuron C Reference Guide

for more

information on this directive). For Series 3100 power line devices, this directive
also enables the pull-up for the IO11 pin. You can define unused pins as

outputs

to avoid using pull-ups.
To perform I/O, you normally use the built-in I/O functions: io_in( ), io_out( ),
io_set_direction( ), io_select( ), io_change_init( ), and io_set_clock( ). The

io_out_request( ) function is used to perform I/O with a parallel I/O object. See

Performing I/O: Functions and Events

on page 18 for more information about

these functions.
I/O objects can also be linked to Neuron C events, because changes in I/O often
affect task scheduling. See

I/O Events

on page 22 for a description of the

io_changes and io_update_occurs events, which are the I/O-related events that

are used in when clauses.

Timer/Counter I/O devices can also be linked to Neuron C interrupt tasks,

allowing for low-latency application-specific response to certain events. The

interrupt trigger is defined by the timer/counter I/O model in use.

All I/O pins IO0..IO11 can also be used to define one or two I/O interrupt tasks,

allowing for low-latency application-specific response to a positive or negative

level, a rising or falling edge, or any edge sampled on that I/O pin. I/O interrupts
operate independently from any I/O devices that are associated with the same

pins.

See the

Neuron C Programmer’s Guide

for more information about application-

specific interrupts.
For more detailed information on, and additional examples of using I/O, see the
following L

ORKS

engineering bulletins:

•

Analog-to-Digital Conversion with the Neuron Chip

engineering bulletin

(part no. 005-0019-01)