Echelon I/O Model Reference for Smart Transceivers and Neuron Chips - Manual (Page 131)

I/O Model Reference 121
specification denotes the lower-numbered pin of the pair and can be IO_0
through IO_6.
timeout ( pin- nbr)
Optionally specifies the timeout signal pin, in the range of IO_0 to IO_7. The
Neuron firmware checks the logic level at this pin whenever it is waiting for a
pulse at either the DATA 0 or DATA 1 pins. If a logic level 1 is sensed, the
transfer is terminated.
io-object-name
A user-specified name for the I/O object, in the ANSI C format for variable
identifiers.
Usage
unsigned int count, input-buffer [ buffer-size ], bit-count ;
count = io_in( object-name, input-buffer, bit-count );
Example
// This application is written so that the
// Wiegand input is being polled for a majority
// of the time, breaking out and returning to the
// scheduler only periodically. This makes the
// probability of capturing the first bits of
// the input much higher since the bits arrive
// asynchronously. Timeout is from a hardware oneshot.
unsigned int data[4], breaker, nbits;
IO_2 input wiegand timeout (IO_0) ioCardData;
IO_0 output oneshot invert clock (7) ioPinTimer = 1;
when(TRUE) {
for (breaker=200; breaker; breaker--) {
io_out(ioPinTimer, 19500UL);
// Store 26 bits into data
nbits = io_in(ioCardData, data, 26);
if (nbits) {
. . . // Process data just read
}
}
}