Timer/counter input models, R 5. timer/counter input models, 123, for more in – Echelon I/O Model Reference for Smart Transceivers and Neuron Chips User Manual
Page 133: Ter 5, Timer/counter input, 123, an
I/O Model Reference
123
5
Timer/Counter Input Models
This chapter describes timer/counter input models.
Timer/counter I/O models use a timer/counter circuit in the
Neuron Chip or Smart Transceiver. Each Neuron Chip and
each Smart Transceiver has two timer/counter circuits: One
whose input can be multiplexed, and one with a dedicated
input.