Hardware considerations – Echelon I/O Model Reference for Smart Transceivers and Neuron Chips User Manual
Page 152
142 Timer/Counter
Input
Models
Hardware Considerations
A timer/counter can be configured to measure the period from one rising or
falling edge to the next corresponding edge on the input. The resolution and
range of the timer/counter period options is described in
on page 188. This model is useful for
instantaneous frequency or tachometer applications. Analog-to-digital conversion
can be implemented using a voltage-to-frequency converter with this model (see
Figure 53 on page 143).
This I/O model is edge sensitive. The clock driving the internal counter in the
Neuron Chip or Smart Transceiver is free running. The detection of active input
edges stops and resets the counter each time.
The actual active edge of the input depends on whether the invert option is used
in the declaration of the function block. The default is the negative edge.
Because the period function measures the delay between two consecutive active
edges, the invert option has no effect on the returned value of the function for a
repeating input waveform.