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Electrical specifications – Grass Valley PDR 200 Service Manual User Manual

Page 23

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Electrical Specifications

PDR200 Service Manual

2-3

Table 2-2. Analog Composite Video E-to-E (Direct)

(Valid only for Factory Installed Analog Composite Input/Output)

Characteristics

Description

Program Gain

Requirement:

1

±

1% Direct

1

±

2% AGC Path

Program Input Gain Range

Requirement:

70% to 140% or Better Direct Path

Supplemental Data:Approximately

±

3 dB

Frequency Response

Requirement:

500 kHz to 5.8 MHz

±

2% Direct or AGC Path

Supplemental Data:-3 dB Nominally 6.25 MHz

Signal-to-Noise Ratio

Requirement:

> 50 dB Direct
> 45 dB AGC Path

Chrominance-to-Luminance
Delay Error

Requirement:

10 ns NTSC Direct or AGC Path

15 ns PAL Direct or AGC

Path

Differential Gain

Requirement:

1.5% NTSC Direct or AGC Path

1.5% PAL Direct or

AGC Path

Differential Phase

Requirement:

1.5

°

Direct or AGC Path

K-Factor

Requirement:

1% Direct or AGC Path

2T Pulse-to-Bar Ratio

Requirement:

1% Direct or AGC Path

Output Timing Range

Requirement:

-21/2H to +148H

Supplemental Data:Independent for each output
Supplemental Data:Resolution;

0.3

°

of 3.58 MHz

Supplemental Data:Timing Stability: 1

°

Sync and Burst Insertion
Timing Accuracy

Requirement:

Meets RS-170A, and CCIR RPT 624-3;
always on

Insertion Phase Error

Requirement:

1

°

Direct or AGC Path

Chrominance Phase Error
with Reference Burst
Frequency Change

Requirement:

1

°

with an input burst. This is a frequency change

of

±

10 Hz Direct or AGC Path

Chrominance Phase Error
with Reference Signal
Amplitude Change

Requirement:

1

°

with a

±

3 dB amplitude change

Direct or AGC Path

DC Offset

Requirement:

≤±

50 mV Direct or AGC Path

Inserted Sync and Burst
Amplitude Accuracy

Requirement:

Sync Direct or AGC Path
NTSC 40 IRE

±

1 IRE

PAL 300 mV

±

7 mV

Burst Direct or AGC Path
NTSC 40 IRE

±

1 IRE

PAL 300 mV

±

7 mV

Inserted Sync and Burst
SCH Phase Accuracy

Requirement:

0

°

±

5

°

Direct or AGC Path

Black Level Error

Requirement:

±

3.5 mV Direct

±

5 mV AGC Path