Altera Triple Speed Ethernet MegaCore Function - Manual (Page 72)

• 10/100/1000-Mbps MAC with 1000BASE-X/SGMII PCS and embedded serial PMA without FIFO buffer
in full-duplex mode
• 10/100/1000-Mbps MAC with 1000BASE-X/SGMII PCS and embedded LVDS I/O without FIFO buffer
in full-duplex mode
• 10/100/1000-Mbps MAC with 1000BASE-X/SGMII PCS
• 10/100/1000-Mbps MAC without FIFO buffer in full-duplex mode
IEEE 1588v2 Features
• Supports 4 types of PTP clock on the transmit datapath:
• Master and slave ordinary clock
• Master and slave boundary clock
• End-to-end (E2E) transparent clock
• Peer-to-peer (P2P) transparent clock
• Supports PTP message types:
• PTP event messages—Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp.
• PTP general messages—Follow_Up, Delay_Resp, Pdelay_Resp_Follow_Up, Announce, Management,
and Signaling.
• Supports simultaneous 1-step and 2-step clock synchronizations on the transmit datapath.
• 1-step clock synchronization—The MAC function inserts accurate timestamp in Sync PTP message
or updates the correction field with residence time.
• 2-step clock synchronization—The MAC function provides accurate timestamp and the related
fingerprint for all PTP message.
• Supports the following PHY operating speed accuracy:
• random error:
• 10Mbps—NA
• 100Mbps—timestamp accuracy of ± 5 ns
• 1000Mbps—timestamp accuracy of ± 2 ns
• static error—timestamp accuracy of ± 3 ns
• Supports IEEE 802.3, UDP/IPv4, and UDP/IPv6 transfer protocols for the PTP frames.
• Supports untagged, VLAN tagged, Stacked VLAN Tagged PTP frames, and any number of MPLS labels.
• Supports configurable register for timestamp correction on both transmit and receive datapaths.
• Supports Time-of-Day (ToD) clock that provides a stream of 64-bit and 96-bit timestamps.
Functional Description Altera Corporation
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UG-01008
IEEE 1588v2 Features 4-36
2014.06.30