Altera Triple Speed Ethernet MegaCore Function - Manual (Page 164)

Configurations (1)
Clocks
MAC and PCS with PMA MAC and PCS MAC Only
Notes to Table 8-1 :
1. Yes indicates that the clock is visible at the top-level design. No indicates that the clock is not visible at
the top-level design. — indicates that the clock is not applicable for the given configuration.
2. Applies to GX transceiver.
MAC and PCS With GX Transceivers
In configurations that contain the MAC, PCS, and GX transceivers, you have the following options in
optimizing clock resources:
• Utilize the same reset signal for all MAC instances if you do not require a separate reset for each instance.
• Utilize the same reference clock for all PMA quads
• Utilize the same clock source to drive the reference clock, FIFO transmit and receive clocks, and system
clocks, if these clocks run at the same frequency.
The Quartus II software automatically optimizes the TBI transmit clocks. Only one clock source drives the
TBI transmit clocks from each PMA quad.
The calibration clock (
gxb_cal_blk_clk
) calibrates the termination resistors in all transceiver channels in
a device. As there is only one calibration circuit in each device, one clock source suffices.
If you do not constrain the PLL inputs and outputs in your design, add
derive_pll_clocks
in the
timing constraint file to ensure that the TimeQuest timing analyzer automatically creates derived
clocks for the PLL outputs.
Note:
Design Considerations Altera Corporation
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MAC and PCS With GX Transceivers 8-2
2014.06.30