Receive, Auto-negotiation, 1000base-x auto-negotiation – Altera Triple Speed Ethernet MegaCore Function User Manual
Page 65: Auto-negotiation -29

Receive
In gigabit mode, the PCS and MAC functions must operate at the same rate. The transmit converter transmits
each byte from the PCS function once to the MAC function.
In 100-Mbps mode, the receive converter transmits one byte out of 10 bytes received from the PCS function
to the MAC function. In 10-Mbps, the receive converter transmits one byte out of 100 bytes received from
the PCS function to the MAC function.
Auto-Negotiation
Auto-negotiation is an optional function that can be started when link synchronization is acquired during
system start up. To start auto-negotiation automatically, set the
AUTO_NEGOTIATION_ENABLE
bit in the PCS
control
register to 1. During auto-negotiation, the PCS function advertises its device features and exchanges
them with a link partner device.
If the
SGMII_ENA
bit in the
if_mode
register is set to 0, the PCS function operates in 1000BASE-X. Otherwise,
the operating mode is SGMII. The following sections describe the auto-negotiation process for each operating
mode.
When simulating your design, you can disable auto-negotiation to reduce the simulation time. If you enable
auto-negotiation in your design, set the
link_timer
time to a smaller value to reduce the auto-negotiation
link timer in the simulation.
Related Information
PCS Configuration Register Space
on page 6-18
1000BASE-X Auto-Negotiation
When link synchronization is acquired, the PCS function starts sending a /C/ sequence (configuration
sequence) to the link partner device with the advertised register set to 0x00. The sequence is sent for a time
specified in the PCS
link_timer
register mapped in the PCS register space.
When the
link_timer
time expires, the PCS
dev_ability
register is advertised, with the
ACK
bit set to 0
for the link partner. The auto-negotiation state machine checks for three consecutive /C/ sequences received
from the link partner.
The auto-negotiation state machine then sets the
ACK
bit to 1 in the advertised
dev_ability
register and
checks if three consecutive /C/ sequences are received from the link partner with the
ACK
bit set to 1.
Auto-negotiation waits for the value configured in the
link_timer
register to ensure no more consecutive
/C/sequences are received from the link partner. The auto-negotiation is successfully completed when three
consecutive idle sequences are received after the link timer expires.
After auto-negotiation completes successfully, the user software reads both the
dev_ability
and
partner_ability
register and proceed to resolve priority for duplex mode and pause mode. If the design
contains a MAC and PCS, the user software configures the MAC with a proper resolved pause mode by
setting the
PAUSE_IGNORE
bit in
command_config
register. To disable pause frame generation based on the
receive FIFO buffer level, you should set the
rx_section_empty
register accordingly.
Altera Corporation
Functional Description
4-29
Receive
UG-01008
2014.06.30