Figure 1-2: multi-port mac – Altera Triple Speed Ethernet MegaCore Function User Manual
Page 11
Figure 1-2: Multi-port MAC
10/100/1000-Mbps
Ethernet MAC
MII/GMII/RGMII
Clie
nt
Side
Ne
tw
ork
Side
Avalon-ST
(Transmit and Receive)
Avalon-MM
(Management and Control)
10/100/1000-Mbps
Ethernet MAC
MII/GMII/RGMII
Avalon-ST
(Transmit and Receive)
Multi-Port MAC
Figure 1-3: 10/100/1000-Ethernet MAC and 1000BASE-X/SGMII PCS with Optional PMA
10/100/1000-Mbps
Ethernet MAC
MII/
GMII
Clie
nt
Side
Ne
tw
ork
Side
Avalon-ST
(Transmit and
Receive)
Avalon-MM
(Management
and Control)
1.25-Gbps
Serial
MAC and PCS with Optional Embedded PMA
1000BASE-X/SGMII
PCS
PMA
(Optional)
TBI
Figure 1-4: 1000BASE-X/SGMII PCS with Optional PMA
MII/GMII
Clie
nt
Side
Ne
tw
ork
Side
1.25-Gbps
Serial
PCS with Optional Embedded PMA
1000BASE-X/SGMII
PCS
PMA
(Optional)
TBI
About This MegaCore Function
Altera Corporation
UG-01008
High-Level Block Diagrams
1-4
2014.06.30
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)