High-level block diagrams, High-level block diagrams -3 – Altera Triple Speed Ethernet MegaCore Function User Manual
Page 10

Small MAC
10/100/1000 Ethernet MAC
Feature
Limited programmable options. The following options
are fixed:
• Maximum frame length is fixed to 1518. Jumbo
frames are not supported.
• FIFO buffer thresholds are set to fixed values.
• Store and forward option is not available.
• Interpacket gap is set to 12.
• Flow control is not supported; pause quanta is not in
use.
• Checking of payload length is disabled.
• Supplementary MAC addresses are disabled.
• Padding removal is disabled.
• Sleep mode and magic packet detection is not
supported.
Fully programmable
Control
interface
registers
Limited configurable options. The following options are
NOT available:
• Flow control
• VLAN
• Statistics counters
• Multicast hash table
• Loopback
• TBI and 1.25 Gbps serial interface
• 8-bit wide FIFO buffers
Fully configurable
Synthesis
options
High-Level Block Diagrams
High-level block diagrams of different variations of the Triple-Speed Ethernet MegaCore function.
Figure 1-1: 10/100/1000-Mbps Ethernet MAC
10/100/1000-Mbps
Ethernet MAC
MII/GMII/RGMII
Clie
nt
Side
Ne
tw
ork
Side
Avalon-ST
(Transmit and Receive)
Avalon-MM
(Management and Control)
Altera Corporation
About This MegaCore Function
1-3
High-Level Block Diagrams
UG-01008
2014.06.30