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1 addressing modes, 2 prefixing operations, 1addressingmodes – Maxim Integrated MAX31782 User Manual

Page 167: 2prefixingoperations

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MaximIntegrated 19-2

MAX31782 User’s Guide

Revision 0; 8/11

SECTION 19: PROGRAMMING

The following section provides a programming overview of the MAX31782 . For full details on the instruction set, as well
as System Register and Peripheral Register detailed bit descriptions, see the appropriate sections in this user’s guide .

19.1AddressingModes

The instruction set for the MAX31782 provides three different addressing modes: direct, indirect, and immediate . The
direct addressing mode can be used to specify either source or destination registers, such as:

move

A[0], A[1] ; copy accumulator 1 to accumulator 0

push

A[0]

; push accumulator 0 on the stack

add

A[1]

; add accumulator 1 to the active accumulator

Direct addressing is also used to specify addressable bits within registers .

move

C, Acc.0

; copy bit zero of the active accumulator

; to the carry flag

move

PO0.3, #1

; set bit three of port 0 Output register

Indirect addressing, in which a register contains a source or destination address, is used only in a few cases .

move

@DP[0], A[0] ; copy accumulator 0 to the data memory

; location pointed to by data pointer 0

move

A[0], @SP-- ; where @SP-- is used to pop the data pointed to

; by the stack pointer register

Immediate addressing is used to provide values to be directly loaded into registers or used as operands .

move

A[0], #10h ; set accumulator 1 to 10h/16d

19.2PrefixingOperations

All instructions on the MAX31782 are 16 bits long and execute in a single cycle . However, some operations require
more data than can be specified in a single cycle or require that high-order register-index bits be set to achieve the
desired transfer . In these cases, the pre- fix register module PFX is loaded with temporary data and/or required register
index bits to be used by the following instruction . The PFX module only holds loaded data for a single cycle before it
clears to zero .
Instruction prefixing is required for the following operations, which effectively makes them two-cycle operations:
• When providing a 16-bit immediate value for an operation (e .g ., loading a 16-bit register, ALU operation, supplying

an absolute pro- gram branch destination), the PFX module must be loaded in the previous cycle with the high byte
of the 16-bit immediate value unless that high byte is zero . One exception to this rule is when supplying an absolute
branch destination to 00xxh . In this case, PFX still must be written with 00h . Otherwise, the branch instruction would
be considered a relative one instead of the desired absolute branch .

• When selecting registers with indexes greater than 07h within a module as destinations for a transfer or registers

with indexes greater than 0Fh within a module as sources, the PFX[n] register must be loaded in the previous cycle .
This can be combined with the previous item .

Generally, prefixing operations can be inserted automatically by the assembler as needed, so that (for example)

move

DP[0], #1234h

actually assembles as

move

PFX[0], #12h

move

DP[0], #34h

However, the operation

move

DP[0], #0055h