Maxim Integrated High-Speed Microcontroller Users Guide: DS80C390 Supplement - Manual (Page 79)

High-Speed Microcontroller User’s Guide: DS80C390 Supplement
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CAN Status Register has been read to clear the previous status change interrupt
flag. Note that if software changes TXS from 0 to 1, an artificial Status Change
Interrupt (STIE=1) will be generated. Thus, if TXS was previously set to 0 and a
reception was successful, TXS will be set to 1 and an enabled interrupt may be
asserted. An interrupt may be asserted (if enabled) if software changes TXS from
0 to 1. If TXS was previously set to 1 and a reception was successful, TXS
remains set and an interrupt may be asserted if enabled. No interrupt will be
asserted if software attempts to set TXS while it is already set.
ER2-0
Bit 2-0 CAN 1 Bus Error Status. These bits indicate the type of error, if any, detected
in the last CAN 1 Bus Frame. These bits will be reset to the 111b state following
any read of the C1S register (when SWINT=0), allowing software to determine if
a new error has been received since the last read of this register. The ER2-0 bits
are read only.
The ER2-0 bits are updated any time they change from 000b or 111b to another
value. If enabled, an interrupt will be generated at this time. Errors received while
the ER2-0 bits are in a non-000b or 111b state will be ignored, leaving ER2-0
unchanged and not generating enabled interrupts. This ensures that error
conditions will not be lost/overwritten before software has a chance to read the
C1S register. Once the C1S register is read and the ER2-0 bits return to 111b, new
errors will be processed normally. In the case of simultaneous errors in multiple
CAN 1 message centers, only the highest priority error is indicated.
ER2 ER1 ER0 Priority Error
Conditions
0 0 0 N/A No Error in Last Frame
0 0 1 2 Bit Stuff Error
0 1 0 5 Format Error
0 1 1 4 Transmit Not Acknowledged Error
1 0 0 6(lowest) Bit 1 Error
1 0 1 1(highest) Bit 0 Error
1 1 0 3 CRC Error
1 1 1 N/A No change since last C1S read
The following is a description of the different error types:
Bit Stuff Error
: Occurs when the CAN controller detects more than 5 consecutive
bits of an identical state are received in an incoming message.
Format Error
: Generated when a received message has the wrong format.
Transmit Not Acknowledged Error : Indicates that a data request message was sent
and the requested node did not acknowledged the message.
Bit 1 Error
: Indicates that the CAN attempted to transmit a message and that
when a recessive bit was transmitted, the CAN bus was found to have a dominant
bit level. This error is not generated when the bit is a part of the arbitration field
(identifier and remote retransmission request).
Bit 0 Error
: Indicates that the CAN attempted to transmit a message and that
when a dominant bit was transmitted, the CAN bus was found to have a recessive
bit level. This error is not generated when the bit is a part of the arbitration field.
The Bit 0 Error is set each time a recessive bit is received during the Busoff
recovery period.
CRC Error
: Generated whenever the calculated CRC of a received message does
not match the CRC embedded in the message.