Maxim Integrated High-Speed Microcontroller Users Guide: DS80C390 Supplement - Manual (Page 23)

High-Speed Microcontroller User’s Guide: DS80C390 Supplement
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RXD1
Bit 2 Serial Port 1 Receive. This pin receives the serial port 1 data in serial port modes
1, 2, 3 and is a bidirectional data transfer pin in serial port mode 0.
T2EX
Bit 1 Timer 2 Capture/Reload Trigger. A 1 to 0 transition on this pin will cause the
value in the T2 registers to be transferred into the capture registers if enabled by
EXEN2 (T2CON.3). When in autoreload mode, a 1 to 0 transition on this pin will
reload the timer 2 registers with the value in RCAP2L and RCAP2H if enabled
by EXEN2 (T2CON.3).
T2
Bit 0 Timer 2 External Input. A 1 to 0 transition on this pin will cause timer 2
increment or decrement depending on the timer configuration.
EXTERNAL INTERRUPT FLAG (EXIF)
7 6 5 4 3 2 1 0
SFR 91h IE5 IE4 IE3 IE2 CKRY RGMD RGSL BGS
RW-0 RW-0 RW-0 RW-0 R-* R-* RW-* RT-0
R = Unrestricted Read, W = Unrestricted Write, T = Timed Access Write Only, -n = Value after Reset, * = See description
IE5
Bit 7 External Interrupt 5 Flag. This bit will be set when a falling edge is detected on
5 INT . This bit must be cleared manually by software. Setting this bit in software
will cause an interrupt if enabled.
IE4
Bit 6 External Interrupt 4 Flag. This bit will be set when a rising edge is detected on
INT4. This bit must be cleared manually by software. Setting this bit in software
will cause an interrupt if enabled.
IE3
Bit 5 External Interrupt 3 Flag. This bit will be set when a falling edge is detected on
3 INT This bit must be cleared manually by software. Setting this bit in software
will cause an interrupt if enabled.
IE2
Bit 4 External Interrupt 2 Flag. This bit will be set when a rising edge is detected on
INT2. This bit must be cleared manually by software. Setting this bit in software
will cause an interrupt if enabled.
CKRY
Bit 3 Clock Ready. The CKRY bit indicates the status of the start-up period delay used
by the crystal oscillator and the crystal clock multiplier warm-up period. CKRY =
0 indicates the startup delay is still counting. When the CKRY = 1 the counter has
completed. This bit is cleared each time the CTM bit in the PMR register is
changed from low to high to start the crystal multiplier. Once the CKRY is set,
the lockout is removed on the CD1, CD0 bits to select the multiplied crystal clock
as a system clock source. This status bit is also cleared each time the crystal
oscillator is restarted when exiting Stop mode.
RGMD
Bit 2 Ring Mode Status. This bit indicates the current clock source for the device.
This bit is cleared to 0 after a power-on reset, and unchanged by all other
forms of reset.
0 = Device is operating from the external crystal or oscillator.
1 = Device is operating from the ring oscillator.