Slave address register 0 (saddr0), Slave address register 1 (saddr1), Lave – Maxim Integrated High-Speed Microcontroller Users Guide: DS80C390 Supplement User Manual
Page 45: Ddress, Egister, 0 (saddr0), 1 (saddr1)

High-Speed Microcontroller User’s Guide: DS80C390 Supplement
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ET0
Bit 1
Enable Timer 0 Interrupt. This bit controls the masking of the Timer 0 interrupt.
0 = Disable all Timer 0 interrupts.
1 = Enable all interrupt requests generated by the TF0 flag (TCON.5).
EX0
Bit 0
Enable External Interrupt 0. This bit controls the masking of external interrupt
0.
0 = Disable external interrupt 0.
1 = Enable all interrupt requests generated by the
0
INT pin.
SLAVE ADDRESS REGISTER 0 (SADDR0)
7 6 5 4 3 2 1 0
SFR
A9h SADDR0.7 SADDR0.6 SADDR0.5 SADDR0.4 SADDR0.3 SADDR0.2 SADDR0.1 SADDR0.0
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0
R = Unrestricted Read, W = Unrestricted Write, -n = Value after Reset
SADDR0.7-0
Bits 7-0
Slave Address Register 0. This register is programmed with the given or
broadcast address assigned to serial port 0.
SLAVE ADDRESS REGISTER 1 (SADDR1)
7 6 5 4 3 2 1 0
SFR
AAh SADDR1.7 SADDR1.6 SADDR1.5 SADDR1.4 SADDR1.3 SADDR1.2 SADDR1.1 SADDR1.0
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0
R = Unrestricted Read, W = Unrestricted Write, -n = Value after Reset
SADDR1.7-0
Bits 7-0
Slave Address Register 1. This register is programmed with the given or
broadcast address assigned to serial port 1.