Maxim Integrated High-Speed Microcontroller Users Guide: DS80C390 Supplement - Manual (Page 68)

High-Speed Microcontroller User’s Guide: DS80C390 Supplement
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CLM
Bit 4 Clear Accelerator Registers. Writing a one to this bit will clear the MA, MB,
and MC registers. Reading this bit will always return a logic 0.
Bit 3-0 Reserved
MULTIPLIER A REGISTER (MA)
7 6 5 4 3 2 1 0
SFR D3h
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0
R = Unrestricted Read, W = Unrestricted Read, -n = Value after Reset
Bits 7-0 Multiplier A Register. The MA Register is used as both a source and result
register for various arithmetic accelerator functions. When in the source mode it
is loaded with the numerator for divide operations and the multiplicand when
performing multiply operations. The MA register also holds the quotient of the
divide operations, multiply product, shift results, and mantissa of the normalize
function.
The MA register can receive or hold up to a 32-bit result, accessed by a series of
sequential writes to or reads from the register. Details of the sequencing are
explained in the arithmetic accelerator section of the user’s guide.
MULTIPLIER B REGISTER (B)
7 6 5 4 3 2 1 0
SFR D4h
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0
R = Unrestricted Read, W = Unrestricted Read, -n = Value after Reset
Bits 7-0 Multiplier B Register. The MB Register is used as both a source and result
register for various arithmetic accelerator functions. When in the source mode it
is loaded with the dividend for divide operations and the multiplier when
performing multiply operations. The MA register also holds the remainder of the
divide operations.
The MB register can receive or hold up to a 32-bit result, accessed by a series of
sequential writes to or reads from the register. Details of the sequencing are
explained in the arithmetic accelerator section of the user’s guide.