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Multiplier c register (c), Can 1 receive message stored register 0 (c1rms0), Ultiplier – Maxim Integrated High-Speed Microcontroller Users Guide: DS80C390 Supplement User Manual

Page 69: Egister, Can 1 r, Eceive, Essage, Tored, 0 (c1rms0)

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High-Speed Microcontroller User’s Guide: DS80C390 Supplement

69 of 158

MULTIPLIER C REGISTER (C)

7 6 5 4 3 2 1 0

SFR D5h

RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0

R = Unrestricted Read, W = Unrestricted Read, -n = Value after Reset

Bits 7-0

Multiplier C Register. The MC Register allows access to the 40-bit accumulator
register for the arithmetic accelerator. Each time a multiply or divide (but not
shift or normalization) function is performed with the arithmetic accelerator the
result is added to the previous value in the MC register.
Data is read from the 40-bit accumulator MSB first, and five read operations must
be performed to read the entire value. Writes to the accumulator are performed
LSB first, but software may write as few registers as needed (i.e., 2 in the case of
a 16-bit value) provided the unloaded registers have been previously initialized to
00h. Details of the sequencing are explained in the Arithmetic Accelerator
section.
All 40 bits of the accumulator are cleared by a system reset, the setting of the
CLM bit or the setting of the MST bit in the MCNT1 SFR. The register can also
be cleared by performing five writes of 00h to the MC register.

CAN 1 RECEIVE MESSAGE STORED REGISTER 0 (C1RMS0)

7 6 5 4 3 2 1 0

SFR

D6h

R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0

R = Unrestricted Read, -n = Value after Reset

CAN 1 Receive Message Stored Register 0. This register indicates which of
CAN 1 message centers 1-8 have successfully received and stored a message
since the last read of this register. A logic one in a location indicates a
message has been received and stored for that message center. This register
is automatically cleared to 00h when read. This register should always be
read in conjunction with the C1RMS1 register to ascertain the status of all
message centers.

C1RMS0.7
Bit 7

Message Center 8, Message Received and Stored

C1RMS0.6
Bit 6

Message Center 7, Message Received and Stored

C1RMS0.5
Bit 5

Message Center 6, Message Received and Stored

C1RMS0.4
Bit 4

Message Center 5, Message Received and Stored

C1RMS0.3
Bit 3

Message Center 4, Message Received and Stored