Timer 2 capture lsb (rcap2l), Timer 2 capture msb (rcap2h), Timer 2 lsb (tl2) – Maxim Integrated High-Speed Microcontroller Users Guide: DS80C390 Supplement User Manual
Page 63: Imer, Apture, Lsb (rcap2l), Msb (rcap2h), 2 lsb (tl2)
High-Speed Microcontroller User’s Guide: DS80C390 Supplement
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DCEN
Bit 0
Down Count Enable. This bit, in conjunction with the T2EX pin, controls the
direction that timer 2 counts in 16-bit auto-reload mode.
DCEN T2EX
DIRECTION
1 1
Up
1 0
Down
0 X
Up
TIMER 2 CAPTURE LSB (RCAP2L)
7 6 5 4 3 2 1 0
SFR CAh
RCAP2L.7 RCAP2L.6 RCAP2L.5 RCAP2L.4 RCAP2L.3 RCAP2L.2 RCAP2L.1 RCAP2L.0
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0
R = Unrestricted Read, W = Unrestricted Write, -n = Value after Reset
RCAP2L.7-0
Bits 7-0
Timer 2 Capture LSB. This register is used to capture the TL2 value when timer
2 is configured in capture mode. RCAP2L is also used as the LSB of a 16-bit
reload value when timer 2 is configured in auto-reload mode.
TIMER 2 CAPTURE MSB (RCAP2H)
7 6 5 4 3 2 1 0
SFR CBh RCAP2H
.7
RCAP2H
.6
RCAP2H
.5
RCAP2H
.4
RCAP2H
.3
RCAP2H
.2
RCAP2H
.1
RCAP2H
.0
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0
R = Unrestricted Read, W = Unrestricted Write, -n = Value after Reset
RCAP2H.7-0
Bits 7-0
Timer 2 Capture MSB. This register is used to capture the TH2 value when
timer 2 is configured in capture mode. RCAP2H is also used as the MSB of a 16-
bit reload value when timer 2 is configured in auto-reload mode.
TIMER 2 LSB (TL2)
7 6 5 4 3 2 1 0
SFR
CCh
TL2.7 TL2.6 TL2.5 TL2.4 TL2.3 TL2.2 TL2.1 TL2.0
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0
R = Unrestricted Read, W = Unrestricted Write, -n = Value after Reset
TL2.7-0
Bits 7-0
Timer 2 LSB. This register contains the least significant byte of Timer 2.