Rainbow Electronics ATmega163L - Manual (Page 74)

ATmega163(L)
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address by using the 2-wire Serial Bus clock as a clock source. The part will then wake up from sleep and the 2-wire Serial
Interface will hold the SCL clock wil low during the wake up and until the TWINT flag is cleared.
Note that the 2-wire Serial Interface Data Register - TWDR does not reflect the last byte present on the bus when waking
up from these Sleep Modes.
Assembly code illustrating operation of the slave receiver mode is given at the end of the TWI section.
Slave Transmitter Mode
In the slave transmitter mode, a number of data bytes are transmitted to a master receiver (see Figure 55). The transfer is
initialized as in the slave receiver mode. When TWAR and TWCR have been initialized, the 2-wire Serial Interface waits
until it is addressed by its own slave address (or the general call address if enabled) followed by the data direction bit which
must be ‘1’ (read) for the 2-wire Serial Interface to operate in the slave transmitter mode. After its own slave address and
the read bit have been received, the 2-wire Serial Interface interrupt flag is set and a valid status code can be read from
TWSR. The status code is used to determine the appropriate software action. The appropriate action to be taken for each
status code is detailed in Table 35. The slave transmitter mode may also be entered if arbitration is lost while the 2-wire
Serial Interface is in the master mode (see state $B0).
If the TWEA bit is reset during a transfer, the 2-wire Serial Interface will transmit the last byte of the transfer and enter state
$C0 or state $C8. the 2-wire Serial Interface is switched to the not addressed slave mode, and will ignore the master if it
continues the transfer. Thus the master receiver receives all ‘1’ as serial data. While TWEA is reset, the 2-wire Serial Inter-
face does not respond to its own slave address. However, the 2-wire Serial Bus is still monitored and address recognition
may resume at any time by setting TWEA. This implies that the TWEA bit may be used to temporarily isolate the 2-wire
Serial Interface from the 2-wire Serial Bus.
Assembly code illustrating operation of the slave receiver mode is given at the end of the TWI section.
Miscellaneous States
There are two status codes that do not correspond to a defined 2-wire Serial Interface state, see Table 36.
Status $F8 indicates that no relevant information is available because the 2-wire Serial Interface interrupt flag (TWINT) is
not set yet. This occurs between other states, and when the 2-wire Serial Interface is not involved in a serial transfer.
Status $00 indicates that a bus error has occured during a 2-wire Serial Bus transfer. A bus error occurs when a START or
STOP condition occurs at an illegal position in the format frame. Examples of such illegal positions are during the serial
transfer of an address byte, a data byte or an acknowledge bit. When a bus error occurs, TWINT is set. To recover from a
bus error, the TWSTO flag must set and TWINT must be cleared by writing a logic one to it. This causes the 2-wire Serial
Interface to enter the not addressed slave mode and to clear the TWSTO flag (no other bits in TWCR are affected). The
SDA and SCL lines are released and no STOP condition is transmitted.