Rainbow Electronics ATmega163L - Manual (Page 45)

ATmega163(L)
45
Timer/Counter2 Control Register - TCCR2
• Bit 7 - FOC2: Force Output Compare
Writing a logical one to this bit, forces a change in the compare match output pin PD7 (OC2) according to the values
already set in COM21 and COM20. If the COM21 and COM20 bits are written in the same cycle as FOC2, the new settings
will not take effect until next compare match or forced output compare match occurs. The Force Output Compare bit can be
used to change the output pin without waiting for a compare match in the timer. The automatic action programmed in
COM21 and COM20 happens as if a Compare Match had occurred, but no interrupt is generated, and the Timer/Counter
will not be cleared even if CTC2 is set. The corresponding I/O pin must be set as an output pin for the FOC2 bit to have
effect on the pin. The FOC2 bit will always be read as zero. Setting the FOC2 bit has no effect in PWM mode.
•
Bit 6 - PWM2: Pulse Width Modulator Enable
When set (one) this bit enables PWM mode for Timer/Counter2. This mode is described on page 37.
•
Bits 5,4 - COM21, COM20: Compare Output Mode, bits 1 and 0
The COM21 and COM20 control bits determine any output pin action following a compare match in Timer/Counter2. Output
pin actions affect pin PD7(OC2). This is an alternative function to an I/O port, and the corresponding direction control bit
must be set (one) to control an output pin. The control configuration is shown in Table 19.
Note: In PWM mode, these bits have a different function. Refer to Table 21 on page 47 for a detailed description.
• Bit 3 - CTC2: Clear Timer/Counter on Compare Match
When the CTC2 control bit is set (one), Timer/Counter2 is reset to $00 in the CPU clock cycle following a compare match.
If the control bit is cleared, the Timer/Counter2 continues counting and is unaffected by a compare match. When a prescal-
ing of 1 is used, and the compare register is set to C, the timer will count as follows if CTC2 is set:
... | C-1 | C | 0 | 1 |...
When the prescaler is set to divide by 8, the timer will count like this:
... | C-1, C-1, C-1, C-1, C-1, C-1, C-1, C-1 | C, C, C, C, C, C, C, C | 0, 0, 0, 0, 0, 0, 0, 0 | 1, 1, 1, ...
In PWM mode, this bit has a different function. If the CTC2 bit is cleared in PWM mode, the Timer/Counter acts as an
up/down counter. If the CTC2 bit is set (one), the Timer/Counter wraps when it reaches $FF. Refer to page 46 for a detailed
description.
•
Bits 2,1,0 - CS22, CS21, CS20: Clock Select Bits 2,1, and 0
The Clock Select bits 2,1, and 0 define the prescaling source of Timer/Counter2.
Bit 7 6 5 4 3 2 1 0
$25 ($45) FOC2 PWM2 COM21 COM20 CTC2 CS22 CS21 CS20 TCCR2
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
Table 19. Compare Mode Select
COM21 COM20 Description
0 0 Timer/Counter disconnected from output pin OC2
0 1 Toggle the OC2 output line.
1 0 Clear the OC2 output line (to zero).
1 1 Set the OC2 output line (to one).
Table 20. Timer/Counter2 Prescale Select
CS22 CS21 CS20 Description
0 0 0 Timer/Counter2 is stopped.
0 0 1 PCK2
0 1 0 PCK2 / 8
0 1 1 PCK2 / 32