Motorola MVME172 - Manual (Page 50)

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Board Description and Memory Maps
1
DMAC for IndustryPack b, request 0 or for IndustryPack a, request 1. This register set is referred to as DMACb in the text.
$38 DMA_b
STATUS
0 DLBE 0 IPEND CHANI TBL IPTO DONE
$39 DMA_b INT
CTRL
0 0 DINT DIEN DICLR DIL2 DIL1 DIL0
$3a DMA ENABLE 0 0 0 0 0 0 0 DEN
$3b RESERVED 0 0 0 0 0 0 0 0
$3c DMA_b CON-
TROL 1
DHALT 0 DTBL ADMA WIDTH1 WIDTH0 A_CH1 XXX
$3d DMA_b CON-
TROL 2
INTE 0 DMAEI DMAEO ENTO TOIP 0 0
$3e RESERVED 0 0 0 0 0 0 0 0
$3f RESERVED 0 0 0 0 0 0 0 0
$40 DMA_b LB
ADDR
LBA31 LBA30 LBA29 LBA28 LBA27 LBA26 LBA25 LBA24
$41 DMA_b LB
ADDR
LBA23 LBA22 LBA21 LBA20 LBA19 LBA18 LBA17 LBA16
$42 DMA_b LB
ADDR
LBA15 LBA14 LBA13 LBA12 LBA11 LBA10 LBA9 LBA8
$43 DMA_b LB
ADDR
LBA7 LBA6 LBA5 LBA4 LBA3 LBA2 LBA1 LBA0
$44 DMA_b IP
ADDR
0 0 0 0 0 0 0 0
$45 DMA_b IP
ADDR
IPA23 IPA22 IPA21 IPA20 IPA19 IPA18 IPA17 IPA16
$46 DMA_b IP
ADDR
IPA15 IPA14 IPA13 IPA12 IPA11 IPA10 IPA9 IPA8
$47 DMA_b IP
ADDR
IPA7 IPA6 IPA5 IPA4 IPA3 IPA2 IPA1 IPA0
$48 DMA_b BYTE
CNT
0 0 0 0 0 0 0 0
$49 DMA_b BYTE
CNT
BCNT23 BCNT22 BCNT21 BCNT20 BCNT19 BCNT18 BCNT17 BCNT16
$4a DMA_b BYTE
CNT
BCNT15 BCNT14 BCNT13 BCNT12 BCNT11 BCNT10 BCNT9 BCN8
$4b DMA_b BYTE
CNT
BCNT7 BCNT6 BCNT5 BCNT4 BCNT3 BCNT2 BCNT1 BCNT0
$4c DMA_b TBL
ADDR
TA31 TA30 TA29 TA28 TA27 TA26 TA25 TA24
$4d DMA_b TBL
ADDR
TA23 TA22 TA21 TA20 TA19 TA18 TA17 TA16
$4e DMA_b TBL
ADDR
TA15 TA14 TA13 TA12 TA11 TA10 TA9 TA8
$4f DMA_b TBL
ADDR
TA7 TA6 TA5 TA4 TA3 TA2 TA1 TA0
Table 1-10. IP2 Chip Memory Map - Control and Status Registers
(Continued)
Register
Offset
Register
Name
Register Bit Names
D7 D6 D5 D4 D3 D2 D1 D0