Motorola MVME172 - Manual (Page 197)

Memory Map of the MC2 Chip Registers
http://www.mcg.mot.com/literature 3-9
3
MC2 chip Base Address = $FFF42000.
Table 3-2. MC2 Chip Register Map
Offset D31-D24 D23-D16 D15-D8 D7-D0
$00 MC2 chip ID MC2 chip
Revision General Control Interrupt Vector
Base Register
$04 Tick Timer 1 Compare Register
$08 Tick Timer 1 Counter Register
$0C Tick Timer 2 Compare Register
$10 Tick Timer 2 Counter Register
$14 LSB Prescaler
Count Register Prescaler Clock
Adjust Tick Timer 2
Control Tick Timer 1
Control
$18 Tick Timer 4
Interrupt Control Tick Timer 3
Interrupt Control Tick Timer 2
Interrupt Control Tick Timer 1
Interrupt Control
$1C DRAM Parity
Error Interrupt
Control SCC Interrupt
Control Tick Timer 4
Control Tick Timer 3
Control
$20 DRAM Space Base Address Register SRAM Space Base Address Register
$24 DRAM Space Size DRAM/SRAM
Options SRAM Space Size Reserved
$28 LANC Error
Status Reserved LANC Interrupt
Control LANC Bus Error
Interrupt Control
$2C SCSI Error Status General Purpose
Inputs MVME172
Version SCSI Interrupt
Control
$30 Tick Timer 3 Compare Register
$34 Tick Timer 3 Counter Register
$38 Tick Timer 4 Compare Register
$3C Tick Timer 4 Counter Register