Motorola MVME172 - Manual (Page 139)

LCSR Programming Model
http://www.mcg.mot.com/literature 2-61
2
DMAC Byte Counter
In the direct mode, this counter is programmed with the number of bytes
of data to be transferred.
Table Address Counter
In the command chaining mode, this counter should be loaded by the
processor with the starting address of the list of commands. This register
gets reloaded by the DMAC with the starting address of the current
command. The last command in a list should have bits 0 and 1 set in the
next command pointer.
VMEbus Interrupter Control Register
ADR/SIZ $FFF40040 (32 bits)
BIT 31 . . . 0
NAME DMAC Byte Counter
OPER R/W
RESET 0 PS
ADR/SIZ $FFF40044 (32 bits)
BIT 31 . . . 0
NAME Table Address Counter
OPER R/W
RESET 0 PS
ADR/SIZ $FFF40048 (8 bits [7 used] of 32)
BIT 31 30 29 28 27 26 25 24
NAME IRQ1S IRQC IRQS IRQL
OPER R/W S R S
RESET 0 PS 0 PS 0 PS 0 PS