Motorola MVME172 - Manual (Page 232)

3-44 Computer Group Literature Center Web Site
MC2 Chip
3
Access and Watchdog Time Base Select Register
The watchdog timer control logic in the MC2 chip is used with the "No
VMEbus Interface" option. This function is duplicated at the same bit
locations in the VMEchip2 at location $FFF4004C. It is permissible to
enable the watchdog timer in both the VMEchip2 and the MC2 chip.
WDTO These bits define the watchdog time-out period:
LBTO These bits define the local bus time-out value. The timer
begins timing when TS is asserted on the local bus. If TA
or TEA is not asserted before the timer times out, a TEA
ADR/SIZ $FFF42044 (8 bits)
BIT 15 14 13 12 11 10 9 8
NAME LBTO WDTO
OPER R/W R/W R/W
RESET 0 0PL 0 PL
Bit
Encoding
Time-out Bit
Encoding
Time-out
0 512
µ
s 8 128 m s
1 1 m s 9 256 m s
2 2 m s 1 0 512 m s
3 4 m s 1 1 1 s
4 8 m s 1 2 4 s
5 6 m s 1 3 16 s
6 32 m s 1 4 32 s
7 64 m s 1 5 64 s