Motorola MVME172 - Manual (Page 207)

Programming Model
http://www.mcg.mot.com/literature 3-19
3
Tick Timer 2 Control Register
Tick Timer 1 Control Register
CEN When this bit is high, the counter increments. When this
bit is low, the counter does not increment.
COC When this bit is high, the counter is reset to zero when it
compares with the compare register. When this bit is low,
the counter is not reset.
COVF The overflow counter is cleared when a one is written to
this bit.
OVF3-OVF0
These bits are the output of the overflow counter. The
overflow counter is incremented each time the tick timer
sends an interrupt to the local bus interrupter. The
overflow counter can be cleared by writing a one to
COVF.
ADR/SIZ $FFF42014 (8 bits)
BIT 15 14 13 12 11 10 9 8
NAME OVF3 OVF2 OVF1 OVF0 COVF COC CEN
OPER R R R R R C R/W R/W
RESET 0 PL 0 PL 0 PL 0 PL 0 0 PL 0 PL 0 PL
ADR/SIZ $FFF42014 (8 bits)
BIT 7 6 5 4 3 2 1 0
NAME OVF3 OVF2 OVF1 OVF0 COVF COC CEN
OPER R R R R R C R/W R/W
RESET 0 PL 0 PL 0 PL 0 PL 0 0 PL 0 PL 0 PL