Motorola MVME172 - Manual (Page 345)

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I
N
D
E
X
IndustryPack
addressing 4-46
error reporting 4-8
ID 1-45
Iinterface 4-1
Interface Controller ASIC (IP2 chip)
4-1, 1-2
initialization 5-37
interrupt
acknowledge map 1-46
base vectors 2-96
control register, VMEchip2 2-102
counter, DMAC 2-63
interrupt handler
routine, how to set up B-3
VMEbus 2-16
VMEchip2 2-18
Interrupt Level Register 4 (bits 0-7) 2-96
interrupt sources, VMEchip2 2-18
interrupt status bit 2-78
Interrupt Vector Base Register 3-13
interrupt vector base register encoding and
priority 3-14
interrupt vectors 1-47
interrupter, VMEbus 2-62
interrupts
broadcast 2-15 , 2-16
edge-sensitive 2-75
hardware-vectored 1-47
how to use B-1
IP2 chip 4-8
masked 2-97
introduction
interrupts, MVME172 B-1
IP2 chip 4-1
MC2 chip 3-1
MCECC chip 5-1
MVME172 1-1
VMEchip2 2-1
IP Clock Register, IP2 chip 4-28
IP RESET Register, IP2 chip 4-30
IP to local bus data routing 4-52
IP_a/IP_ab Memory Base Address Registers
4-20
IP_b Memory Base Address Registers 4-20
IP_c/IP_cd Memory Base Address Registers
4-21
IP_d Memory Base Address Registers 4-21
IP2 chip 4-1
Control and Status Registers memory
map 1-29
features 4-1
functional description 4-2
introduction 4-1
IP to local bus data routing 4-52
local bus to IndustryPack addressing
4-46
overall memory map 1-28 , 4-9
programming model 4-10
IRQ0, IRQ1 Interrupt Control Registers, IP2
chip 4-23
IRQ1 edge-sensitive interrupter 2-19
IRQ7-1 interrupters 2-19
L
LAN
interface 3-3
LTO error 1-55
off-board error 1-55
parity error 1-54
LANC
bus error 3-4
Bus Error Interrupt Control Register
3-32
Error Status Register 3-30
interrupt 3-5
LCSR, VMEchip2 2-20
base address 2-20
memory map 2-22
programming model 2-20
LED, VME 2-100
light- emitting diodes (LEDs) 1-4
LM/SIG Register, VMEchip2 2-105
local BERR* 1-48