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Altera Arria V Avalon-ST User Manual

Page 244

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Date

Version

Changes Made

Made the following changes to the user guide:
• Created separate user guides for variants using the Avalon-MM,

Avalon-ST, and Avalon-MM with DMA interfaces to the Applica‐

tion Layer.

• Added Next Steps in Creating a Design for PCI Express to

Datasheet chapter.

• Enhanced definition of Device ID and Sub-system Vendor ID to

say that these registers are only valid in the Type 0 (Endpoint)

Configuration Space.

• Changed the default reset controller settings. By default Gen1

devices use the Hard Reset Controller. Gen2 uses the Soft Reset

Controller.

• Removed references to the MegaWizard

®

Plug-In Manager. In

14.0 the IP Parameter Editor Powered by Qsys has replaced the

MegaWizard Plug-In Manager.

• Removed reference to Gen2 x1 62.5 MHz configuration in

Application Layer Clock Frequency for All Combination of Link

Width, Data Rate and Application Layer Interface Widths table.

This configuration is not supported.

• Added definition for

test_in[6]test_out

bus.

• Added definitions for Hard IP Reconfiguration bus. This bus

became an optional feature in version 13.1 of the core.

• Updated interrupt interface to reflect changes for multi-function

support:

app_int_sts

implements legacy interrupts.

• Added definitions for the

txmargin

,

txswing

, and

testin_zero

signals.

• Removed definition for the

busy_xcvr_reconfig

signal which is

not used.

• Added section on relaxed ordering.

• Added sections on making analog QSF and pin assignments.

• Removed

reconfig_busy

port from connect between PHY IP

Core for PCI Express and the Transceiver Reconfiguration

Controller in the Altera Transceiver Reconfiguration Controller

Connectivity figure. The Transceiver Reconfiguration Controller

drives

reconfig_busy

port to the Altera PCIe Reconfig Driver.

• Improved description of qword alignment of TLPs.

• Added fact that DCD calibration is required for Gen2 data rate in

the description of the transceiver reconfiguration signals. Updated

figure showing Transceiver Reconfiguration Controller parameter

editor.

C-2

Revision History for the Avalon-St Interface

2014.12.15

Altera Corporation

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