Qsys design flow – Altera Arria V Avalon-ST User Manual
Page 15
For a detailed explanation of this example design, refer to the Testbench and Design Example chapter. If
you choose the parameters specified in this chapter, you can run all of the tests included in Testbench and
Design Example chapter.
For more information about Qsys, refer to System Design with Qsys in the Quartus II Handbook. For more
information about the Qsys GUI, refer to About Qsys in Quartus II Help.
Related Information
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Qsys Design Flow
Copy the pcie_de_gen1_x4_ast64.qsys design example from the
pcie/altera_pcie_hip_ast_ed/example_designs/
to your working directory. The following figure
illustrates this Qsys system.
2-2
Qsys Design Flow
2014.12.15
Altera Corporation
Getting Started with the Arria V Hard IP for PCI Express