Debugging, Hardware bring-up issues, Link training – Altera Arria V Avalon-ST User Manual
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Debugging
17
2014.12.15
As you bring up your PCI Express system, you may face a number of issues related to FPGA configura‐
tion, link training, BIOS enumeration, data transfer, and so on. This chapter suggests some strategies to
resolve the common issues that occur during hardware bring-up.
Hardware Bring-Up Issues
Typically, PCI Express hardware bring-up involves the following steps:
1. System reset
2. Link training
3. BIOS enumeration
The following sections, describe how to debug the hardware bring-up flow. Altera recommends a
systematic approach to diagnosing bring-up issues as illustrated in the following figure.
Figure 17-1: Debugging Link Training Issues
No
system reset
Does Link
Train
Correctly?
Check PIPE
Interface
Use PCIe
Analyzer
Soft Reset System to
Force Enumeration
Check Configuration
Space
Check LTSSM
Status
Yes
Yes
No
Successful
OS/BIOS
Enumeration?
Link Training
The Physical Layer automatically performs link training and initialization without software intervention.
This is a well-defined process to configure and initialize the device's Physical Layer and link so that PCIe
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