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Questionable status sem limit register – GW Instek GSP-930 Programming Manual User Manual

Page 49

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47

Questionable Status SEM Limit Register

Overview

The Questionable Status SEM Limit Register
Group indicates if any of the SEM offset limits
have been tripped.

Bit Summary

Bit Weight Description
0

1

Offset 1 Upper Fail: This bit is set to 1
when the SEM Offset 1 upper limit has
been violated.

1

2

Offset 1 Lower Fail: This bit is set to 1
when the SEM Offset 1 lower limit has
been violated.

2

4

Offset 2 Upper Fail: This bit is set to 1
when the SEM Offset 2 upper limit has
been violated.

3

8

Offset 2 Lower Fail: This bit is set to 1
when the SEM Offset 2 lower limit has
been violated.

4

16

Offset 3 Upper Fail: This bit is set to 1
when the SEM Offset 3 upper limit has
been violated.

5

32

Offset 3 Lower Fail: This bit is set to 1
when the SEM Offset 3 lower limit has
been violated.

6

64

Offset 4 Upper Fail: This bit is set to 1
when the SEM Offset 4 upper limit has
been violated.

7

128

Offset 4 Lower Fail: This bit is set to 1
when the SEM Offset 4 lower limit has
been violated.

8

256

Offset 5 Upper Fail: This bit is set to 1
when the SEM Offset 5 upper limit has
been violated.

9

512

Offset 5 Lower Fail: This bit is set to 1
when the SEM Offset 5 lower limit has
been violated.