GW Instek GSP-930 Programming Manual - Manual (Page 45)

REMOTE CONTROL
43
0
:
:
15
Condition
Register
1
0
:
:
15
PTR /
NTR
1
0
:
:
15
Event
Register
1
0
:
:
15
Enable
Register
1
+
To higher
order register
&
:
:
&
&
&
&
&
&
&
&
&
Status Byte Register (STB)
Overview The Status Byte register consolidates the status
events of all the status registers. The Status Byte
register can be cleared with the *CLS command.
Any bits set in the Status byte register acts as a
summary register for all the other status
registers and indicates if there is a service
request, an error in the Error Queue or data in
the Output Queue. Reading the Status Byte
register will reset the register to 0.
The Service Request Enable Register controls
which bits in the Status Byte Register are able to
generate service requests.
Bit Summary Bit Weight Description
2 4 Error/Event Queue Summary bit: This
bit is set when there is a message in the
error queue.
3 8 Questionable Status Summary Bit: This
is the summary bit for the Questionable
Status Register.
4 16 MAV: This bit is set when there is a
message in the output queue.