Table – HP A7818-IE002 User Manual
Page 45
System Board
Input/output Controller Hub 2 (82801BA)
Chapter 2
45
The following table shows the available ICH2 features, and the following sections
discuss them.
Feature
Feature
•
Multifunction PCI bus interface:
—
PCI at 32-bit 33MHz
—
PCI 2.2 specification
—
133MB/sec data transfer rate
—
Master PCI device support for as many
as five devices
•
Enhanced DMA controller:
—
Two 82C37 DMA controllers
—
PCI DMA with two PC/PCI channels in
pairs
—
LPC DMA
—
DMA collection buffer to provide Type-F
DMA performance for all DMA channels
•
USB, supporting:
—
USB 1.1 compliant
—
UHCI implementation with four USB
ports for serial transfers at 1.2 or
1.5Mbit/sec
—
Wake-up from sleeping states
—
Legacy keyboard/mouse software
•
Interrupt Controller:
—
Two cascaded 82C59 controllers
—
Integrated I/O APIC capability
—
15 interrupt support in 8259 mode, 24
supported in I/O APIC mode
—
Serial interrupt protocol
•
Power Management Logic:
—
ACPI 1.0 compliant
—
Support for APM-based legacy power
management for non-ACPI
implementations
—
ACPI defined power states (S1, S3, S4,
S5)
—
ACPI power management timer
—
SMI generation
—
All registers readable/restorable for
proper resume from 0V suspend states
—
PCI PME#
•
Integrated IDE controller:
—
Independent timing of as many as four
drives
—
Ultra ATA/100 mode (100MB/sec)
—
Ultra ATA/66 mode (66MB/sec)
—
Ultra ATA/33 mode (33MB/sec)
—
PIO mode four transfers as fast as
14MB/sec
—
Separate IDE connections for primary
and secondary cables
—
Integrated 16 x 32-bit buffer for IDE
PCI burst transfers
—
Write ping-pong buffer for faster write
performances
•
Real-time clock, supporting:
—
256-byte battery-backed CMOS RAM
—
Hardware implementation to indicate
century rollover
•
System TCO reduction circuits:
—
Timers to generate SMI# and reset upon
—
Timers to detect improper processor
reset
—
Integrated processor frequency strap
logic
•
Timers based on 82C54:
—
System timer, refresh request, speaker
tone output
•
SMBus
—
Host interface allows processor to
communicate via SMBus
—
Compatible with two-wire I2C bus
•
System timer, refresh request, speaker tone
output
•
GPIO:
—
TTL, Open-Drain, Inversion