beautypg.com

Device identification registers – Altera Stratix V Avalon-MM Interface for PCIe Solutions User Manual

Page 24

background image

Parameter

Value

Description

Size

Not configurable

Specifies the memory size calculated from other

parameters you enter.

Device Identification Registers

Table 3-3: Device ID Registers

The following table lists the default values of the read-only Device ID registers. You can use the parameter editor

to change the values of these registers. Refer to Type 0 Configuration Space Registers for the layout of the Device

Identification registers.

Register Name

Range

Default Value

Description

Vendor ID

16 bits

0x00000000

Sets the read-only value of the

Vendor ID

register. This

parameter cannot be set to 0xFFFF, per the PCI Express

Specification.
Address offset: 0x000.

Device ID

16 bits

0x00000001

Sets the read-only value of the

Device ID

register. This

register is only valid in the Type 0 (Endpoint) Configu‐

ration Space.
Address offset: 0x000.

Revision ID

8 bits

0x00000001

Sets the read-only value of the

Revision ID

register.

Address offset: 0x008.

Class code

24 bits

0x00000000

Sets the read-only value of the

Class Code

register.

Address offset: 0x008.

Subsystem

Vendor ID

16 bits

0x00000000

Sets the read-only value of the

Subsystem Vendor ID

register in the PCI Type 0 Configuration Space. This

parameter cannot be set to 0xFFFF per the PCI Express

Base Specification. This value is assigned by PCI-SIG to

the device manufacturer. This register is only valid in

the Type 0 (Endpoint) Configuration Space.
Address offset: 0x02C.

Subsystem

Device ID

16 bits

0x00000000

Sets the read-only value of the

Subsystem Device ID

register in the PCI Type 0 Configuration Space.
Address offset: 0x02C

3-4

Device Identification Registers

UG-01097_avmm

2014.12.15

Altera Corporation

Parameter Settings

Send Feedback

This manual is related to the following products: