Altera Stratix V Avalon-MM Interface for PCIe Solutions User Manual
Page 162
Table 13-3: ECRC Generation and Forwarding on TX Path
All unspecified cases are unsupported and the behavior of the Hard IP is unknown.
ECRC Forwarding
ECRC Generation
Enable
(6)
TLP on Applica‐
tion
TLP on Link
Comments
No
No
TD
=0, without
ECRC
TD
=0, without
ECRC
TD
=1, without
ECRC
TD
=0, without
ECRC
Yes
TD
=0, without
ECRC
TD
=1, with
ECRC
ECRC is generated
TD
=1, without
ECRC
TD
=1, with
ECRC
Yes
No
TD
=0, without
ECRC
TD
=0, without
ECRC
Core forwards the ECRC
TD
=1, with
ECRC
TD
=1, with
ECRC
Yes
TD
=0, without
ECRC
TD
=0,
without
ECRC
TD
=1, with
ECRC
TD
=1, with
ECRC
Related Information
Transaction Layer Packet (TLP) Header Formats
on page 15-1
(6)
The
ECRC Generation Enable
field is in the
Configuration Space Advanced Error Capabilities and
Control Register
.
13-4
ECRC on the TX Path
UG-01097_avmm
2014.12.15
Altera Corporation
Optional Features