Altera Stratix V Avalon-MM Interface for PCIe Solutions User Manual
Page 165
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Possible Causes
Symptoms and Root Causes
Workarounds and Solutions
Link fails with
LTSSM stuck in
Detect.Active state
(1)
This behavior may be caused by
a PMA issue if the host
interrupts the Electrical Idle
state as indicated by high to low
transitions on the RxElecIdle
(
rxelecidle)
signal when
TxDetectRx=0 (
txdetectrx0)
at PIPE interface. Check if OCT
is turned off by a Quartus
Settings File (.qsf) command.
PCIe requires that OCT must be
used for proper Receiver Detect
with a value of 100 Ohm. You
can debug this issue using
SignalTap II and oscilloscope.
For Stratix V devices, a workaround is
implemented in the reset sequence.
Link fails with the
LTSSM toggling
between:
Detect.Quiet (0),
Detect.Active (1),
and Polling.Active
(2),
or:
Detect.Quiet (0),
Detect.Active (1),
and Polling.Configu‐
ration (4)
On the PIPE interface extracted
from the
test_out
bus, confirm
that the Hard IP for PCI Express
IP Core is transmitting valid
TS1 in the Polling.Active(2)
state or TS1 and TS2 in the
Polling.Configuration (4) state
on txdata0. The Root Port
should be sending either the TS1
Ordered Set or a compliance
pattern as seen on
rxdata0
.
These symptoms indicate that
the Root Port did not receive the
valid training Ordered Set from
Endpoint because the Endpoint
transmitted corrupted data on
the link. You can debug this
issue using SignalTap II. Refer
to PIPE Interface Signals for a
list of the
test_out
bus signals.
The following are some of the reasons the
Endpoint might send corrupted data:
• Signal integrity issues. Measure the TX eye
and check it against the eye opening require‐
ments in the PCI Express Base Specification,
Rev 3.0. Adjust the transceiver pre-emphasis
and equalization settings to open the eye.
• Bypass the Transceiver Reconfiguration
Controller IP Core to see if the link comes up
at the expected data rate without this
component. If it does, make sure the
connection to Transceiver Reconfig
Controller IP Core is correct.
UG-01097_avmm
2014.12.15
Debugging Link that Fails To Reach L0
14-3
Debugging
Altera Corporation