Rainbow Electronics ATmega8HVD - Manual (Page 38)

38
8052B–AVR–09/08
ATmega4HVD/8HVD
10. System Control and Reset
10.1 Resetting the AVR
During reset, all I/O Registers are set to their initial values, and the program starts execution
from the Reset Vector. The instruction placed at the Reset Vector must be a JMP – Absolute
Jump – instruction to the reset handling routine. If the program never enables an interrupt
source, the Interrupt Vectors are not used, and regular program code can be placed at these
locations. The circuit diagram in
Figure 10-1 on page 39 shows the reset logic. ”System and
Reset Characteristics” on page 144 defines the electrical parameters of the reset circuitry.
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes
active. This does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal
reset. This allows the voltage regulator to reach a stable level before normal operation starts.
The timeout period of the delay counter is defined by the user through the SUT Fuses. The dif-
ferent selections for the delay period are presented in
”Clock Sources” on page 23 .
10.2 Reset Sources
The ATmega4HVD/8HVD has these reset sources:
• The Power-on Reset module generates a Power-on Reset when the Voltage Regulator starts
up.
• External Reset. The MCU is reset when a low level is present on the RESET pin for longer
than the minimum pulse length.
• Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and the
Watchdog is enabled.
• Black-out Reset. The MCU is reset when V
REG
is below the Black-out Reset Threshold,
V
BLOT
. See “Black-out Detection” on page 40.
• debugWIRE. In On-chip Debug mode, the debugWIRE resets the MCU when giving the
Reset command.