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Figure, Atmega4hvd/8hvd – Rainbow Electronics ATmega8HVD User Manual

Page 107

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107

8052B–AVR–09/08

ATmega4HVD/8HVD

Figure 20-1. Example in External protection Input

Note:

1. To ensure that the FET switch ON time is as expected, the chip should remain in Active/Idle

mode during this time period. Alternatively, SW may switch off the FETs while External Pro-
tection Input is active, and re-enable FETs on next INT1 interrupt. In this case, SW may
enter Power-save without considering the switch ON time of the FETs.

FCSR [CFE]

FCSR [DFE]

PC1

INT1

OC

OD

Guard time

(1)

Chip operating mode < Active > < P-save > < Active > < P-save >

Interrupt
handling