Rainbow Electronics ATmega8HVD - Manual (Page 3)

3
8052B–AVR–09/08
ATmega4HVD/8HVD
1.1 Pin Descriptions
1.1.1 VFET
Input to the internal voltage regulator.
1.1.2 VCC
Pin for connection of external decoupling capacitor. VCC is internally connected to the voltage
regulator output VREG.
1.1.3 VREG
Output from the internal voltage regulator. Internally connected to VCC.
1.1.4 GND
Ground
1.1.5 Port B (PB2:PB0)
Port B is a low-voltage 3-bit bi-directional I/O port with internal pull-up resistors (selected for
each bit). As inputs, Port B pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port B also serves the functions of various special features of the ATmega4HVD/8HVD.
1.1.6 Port C (PC1:PC0)
Port C is a High-voltage open-drain 2 bit bi-directional I/O port. Port C also serves the func-
tions of various special features of the ATmega4HVD/8HVD.
1.1.7 OC
High voltage output to drive Charge FET (optional).
1.1.8 OD
High voltage output to drive Discharge FET.
1.1.9 NI
Negative input from the battery protection resistor.
1.1.10 PV1
Input from battery cell to ADC.
1.1.11 BATT
Input for detecting when a charger is connected.
1.1.12 RESET/dw
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a reset.
This pin is also used as debugWIRE communication pin.