Rainbow Electronics DS26503 - Manual (Page 88)

DS26503 T1/E1/J1 BITS Element
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Register Name:
SR1
Register Description: Status Register 1
Register Address: 14h
Bit
# 7 6 5 4 3 2 1 0
Name — — — JALT — TCLE TOCD —
Default 0 0 0 0 0 0 0 0
HW
Mode
X X X X X X X X
Bit 0/Unused, must be set = 0 for proper operation.
Bit 1/Transmit Open Circuit Detect Condition (TOCD). Set when the device detects that the TTIP and TRING outputs are
open-circuited.
Bit 2/Transmit Current Limit Exceeded Condition (TCLE). Set when the 50mA (rms) current limiter is activated whether
the current limiter is enabled or not.
Bit 3/Unused, must be set = 0 for proper operation.
Bit 4/Jitter Attenuator Limit Trip Event (JALT). Set when the jitter attenuator FIFO reaches to within 4 bits of its useful
limit. Will be cleared when read. Useful for debugging jitter-attenuation operation.
Bit 5/Unused, must be set = 0 for proper operation.
Bit 6/Unused, must be set = 0 for proper operation.
Bit 7/Unused, must be set = 0 for proper operation.