Zilog Z8F0130 - Manual (Page 318)

Using the Macro Assembler UM013037-1212
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Zilog Developer Studio II – Z8 Encore!
User Manual
ldc r2,@.RR(rreg)
If rreg is at %46 , it is then equivalent to:
ldc r2,@rr6
Define Bank0, Space = RData, org =0

segment Bank0
testmeds1
segment Code
srp #.WRG(testme)

incw .RR(testme)
You must be careful if you want to use escaped mode addressing with 8-bit addresses in
extended addressing instructions such as
LDX , ADDX , and ANDX , as described in the eZ8
CPU User Manual (UM0128) . This is sometimes referred to as RP -based page addressing
because the upper 4 bits of the address are taken from RP[0:3] and a page from 00H to
FFH of addressing is taken from the low 8 bits of the operand. The point to be careful about
is that to use this type of addressing, you have to use the hexadecimal digit E as the top nib-
ble of your instruction.


For example:


LDX %E25,%213


writes to a destination address whose lower 8 bits are
25H and whose upper 4 bits are taken
from the RP , as intended. Conversely, if you write:


LDX %25,%213


this latter instruction is converted by the assembler into the only accepted form of
LDX that
matches the operands that are given; specifically, %25 is taken to be the 12-bit operand
025H , and that is used as the destination of the load.
Directives
Directives control the assembly process by providing the assembler with commands and
information. These directives are instructions to the assembler itself and are not part of the
Note: