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Automatic working register definitions – Zilog Z8F0130 User Manual

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UM013037-1212

Automatic Working Register Definitions

Zilog Developer Studio II – Z8 Encore!

User Manual

293


ld a, 1<<2 | 1<<2 | 1<<1


The constant expression in the preceding instruction evaluates to 2A H.


If you want to perform the Shift Left operations before the OR operation, use parentheses
as:


ld a, #(1<<2)|(1<<2)|(1<<1)


The modified constant expression evaluates to

6 H

.

Automatic Working Register Definitions

Z8 Encore! supports 4-, 8-, and 12-bit addressing of registers. Automatic working register
definitions allow you to specify which mode the assembler uses. The default is 12-bit
mode.

The following examples show how to use automatic working register definitions:

lab equ %54

ldx @r1,@.ER(lab)

is encoded as

8754E1

ldx @.ER(lab),@r2

is encoded as

97E254

ldx rp, #.WRG(wbase)

If

wbase

is at

%234

, it is then equivalent to:

ldx rp, #%32

ld r0,.R(reg)

If

reg

is at

%43

, it is then equivalent to:

ld r0, r3

.ER

Indicates that the enclosed address is to be encoded as a 8-bit register pair
address. Only valid in ldx instruction.

.R

Indicates that the lower nibble of the enclosed label has to be encoded in the
instruction.

.RR

Indicates that the enclosed label is at the even boundary and the lower nibble is
to be encoded in the instruction.

.WRG

Computes the value to store in the RP register so that the given label can be
accessed using the 4- or 8-bit addressing mode.