Automatic working register definitions – Zilog Z8F0130 User Manual
Page 317

UM013037-1212
Automatic Working Register Definitions
Zilog Developer Studio II – Z8 Encore!
User Manual
293
ld a, 1<<2 | 1<<2 | 1<<1
The constant expression in the preceding instruction evaluates to 2A H.
If you want to perform the Shift Left operations before the OR operation, use parentheses
as:
ld a, #(1<<2)|(1<<2)|(1<<1)
The modified constant expression evaluates to
6 H
.
Automatic Working Register Definitions
Z8 Encore! supports 4-, 8-, and 12-bit addressing of registers. Automatic working register
definitions allow you to specify which mode the assembler uses. The default is 12-bit
mode.
The following examples show how to use automatic working register definitions:
lab equ %54
ldx @r1,@.ER(lab)
is encoded as
8754E1
ldx @.ER(lab),@r2
is encoded as
97E254
ldx rp, #.WRG(wbase)
If
wbase
is at
%234
, it is then equivalent to:
ldx rp, #%32
ld r0,.R(reg)
If
reg
is at
%43
, it is then equivalent to:
ld r0, r3
.ER
Indicates that the enclosed address is to be encoded as a 8-bit register pair
address. Only valid in ldx instruction.
.R
Indicates that the lower nibble of the enclosed label has to be encoded in the
instruction.
.RR
Indicates that the enclosed label is at the even boundary and the lower nibble is
to be encoded in the instruction.
.WRG
Computes the value to store in the RP register so that the given label can be
accessed using the 4- or 8-bit addressing mode.
- Z8F0131 Z8F0230 Z8F0231 Z8F0430 Z8F0431 Z8F043A Z8F0830 Z8F0831 Z8F083A Z8F1232 Z8F1233 Z8F0113 Z8F011A Z8F0123 Z8F012A Z8F0213 Z8F021A Z8F0223 Z8F022A Z8F0411 Z8F0412 Z8F0413 Z8F041A Z8F0421 Z8F0422 Z8F0423 Z8F042A Z8F0811 Z8F0812 Z8F0813 Z8F081A Z8F0821 Z8F0822 Z8F0823 Z8F082A Z8F0880 Z8F1621 Z8F1622 Z8F1680 Z8F1681 Z8F1682 Z8F2421 Z8F2422 Z8F2480 Z8F3221 Z8F3222 Z8F3281 Z8F3282 Z8F4821 Z8F4822 Z8F4823 Z8F6081 Z8F6082 Z8F6421 Z8F6422 Z8F6423 Z8F6481 Z8F6482 Z8FS021A ZMOT1AHH Z8FS040B ZMOT0BHH ZMOT0BSB Z8FMC04 Z8FMC08 Z8FMC16