Maxim Integrated DS33Z41 - Manual (Page 94)

DS33Z41 Quad IMUX Ethernet Mapper
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Register Name:
LI.TPCR0
Register Description: Transmit Packet Count Byte 0
Register Address: 0CCh
Bit
# 7 6 5 4 3 2 1 0
Name TPC7 TPC6 TPC5 TPC4 TPC3 TPC2 TPC1 TPC0
Default
0 0 0 0 0 0 0 0
Bits 7 to 0: Transmit Packet Count (TPC7 to TPC0). Eight bits of 24-bit value. Register description below.
Register Name:
LI.TPCR1
Register Description: Transmit Packet Count Byte 1
Register Address: 0CDh
Bit
# 7 6 5 4 3 2 1 0
Name TPC15 TPC14 TPC13 TPC12 TPC11 TPC10 TPC9 TPC8
Default
0 0 0 0 0 0 0 0
Bits 7 to 0: Transmit Packet Count (TPC15 to TPC8). Eight bits of 24-bit value. Register description below.
Register Name:
LI.TPCR2
Register Description: Transmit Packet Count Byte 2
Register Address: 0CEh
Bit
# 7 6 5 4 3 2 1 0
Name TPC23 TPC22 TPC21 TPC20 TPC19 TPC18 TPC17 TPC16
Default
0 0 0 0 0 0 0 0
Bits 7 to 0: Transmit Packet Count (TPC23 to TPC16). These 24 bits indicate the number of packets extracted
from the Transmit FIFO and output in the outgoing data stream.