Maxim Integrated DS33Z41 - Manual (Page 126)

DS33Z41 Quad IMUX Ethernet Mapper
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Register Name:
SU.MACAH
Register Description: MAC Address High Register
Register Address: 0004h (indirect)
0004h:
Bit
# 31 30 29 28 27 26 25 24
Name Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
Default 1 1 1 1 1 1 1 1
0005h:
Bit
# 23 22 21 20 19 18 17 16
Name Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
Default 1 1 1 1 1 1 1 1
0006h:
Bit
# 15 14 13 12 11 10 09 08
Name PADR47 PADR46 PADR45 PADR44 PADR43 PADR42 PADR41 PADR40
Default
1 1 1 1 1 1 1 1
0007h:
Bit
# 07 06 05 04 03 02 01 00
Name PADR39 PADR38 PADR37 PADR36 PADR35 PADR34 PADR33 PADR32
Default 1 1 1 1 1 1 1 1
Bits 31 to 00: PADR47 to PADR32. These 32 bits should be initialized with the upper 4 bytes of the Physical
Address for this MAC device.
Register Name:
SU.MACAL
Register Description: MAC Address Low Register
Register Address: 0008h (indirect)
0008h:
Bit
# 31 30 29 28 27 26 25 24
Name PADR31 PADR30 PADR29 PADR28 PADR27 PADR26 PADR25 PADR24
Default
1 1 1 1 1 1 1 1
0009h:
Bit
# 23 22 21 20 19 18 17 16
Name PADR23 PADR22 PADR21 PADR20 PADR19 PADR18 PADR17 PADR16
Default
1 1 1 1 1 1 1 1
000Ah:
Bit
# 15 14 13 12 11 10 09 08
Name PADR15 PADR14 PADR13 PADR12 PADR11 PADR10 PADR09 PADR08
Default
1 1 1 1 1 1 1 1
000Bh:
Bit
# 07 06 05 04 03 02 01 00
Name PADR07 PADR06 PADR05 PADR04 PADR03 PADR02 PADR01 PADR00
Default 1 1 1 1 1 1 1 1
Bits 31 to 00: PADR31 to PADR00. These 32 bits should be initialized with the lower 4 bytes of the Physical
Address for this MAC device.