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Maxim Integrated DS33Z41 User Manual

Page 77

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DS33Z41 Quad IMUX Ethernet Mapper

77 of 167

Register Name:

GL.IMXOOFIE

Register Description:

Inverse MUX OOF Interrupt Enable

Register Address:

1Eh


Bit

# 7 6 5 4 3 2 1 0

Name

TOOFIE4

TOOFIE3 TOOFIE2 TOOFIE1 ROOFIE4 ROOFIE3 ROOFIE2 ROOFIE1

Default

0 0 0 0 0 0 0 0

Bit 7: IMUX Transmit OOF Interrupt Enable 4 (TOOFIE4). Setting this bit to 1 enables an interrupt on
TOOFLS4.
Bit 6: IMUX Transmit OOF Interrupt Enable 3 (TOOFIE3). Setting this bit to 1 enables an interrupt on
TOOFLS3.
Bit 5: IMUX Transmit OOF Interrupt Enable 2 (TOOFIE2). Setting this bit to 1 enables an interrupt on
TOOFLS2.
Bit 4: IMUX Transmit OOF Interrupt Enable 1 (TOOFIE1). Setting this bit to 1 enables an interrupt on
TOOFLS1.
Bit 3: IMUX Receive OOF Interrupt Enable 4 (ROOFIE4). Setting this bit to 1 enables an interrupt on
ROOFLS4.
Bit 2: IMUX Receive OOF Interrupt Enable 3 (ROOFIE3). Setting this bit to 1 enables an interrupt on
ROOFLS3.
Bit 1: IMUX Receive OOF Interrupt Enable 2 (ROOFIE2). Setting this bit to 1 enables an interrupt on
ROOFLS2.
Bit 0: IMUX Receive OOF Interrupt Enable 1 (ROOFIE1). Setting this bit to 1 enables an interrupt on
ROOFLS1.