Maxim Integrated DS33Z41 - Manual (Page 114)

DS33Z41 Quad IMUX Ethernet Mapper
114 of 167
Register Name:
SU.MACWD1
Register Description: MAC Write Data Byte 1
Register Address: 147h
Bit
# 7 6 5 4 3 2 1 0
Name MACWD15 MACWD14 MACWD13 MACWD12 MACWD11 MACWD10 MACWD09 MACWD08
Default
0 0 0 0 0 0 0 0
Bits 7 to 0: MAC Write Data Byte 1 (MACWD15 to MACWD08). One of four bytes of data to be written to the
MAC. Data has been written after a write command has been issued and the
SU.MACRWC .MCS bit is zero.
Register Name:
SU.MACWD2
Register Description: MAC Write Data Register 2
Register Address: 148h
Bit
# 7 6 5 4 3 2 1 0
Name MACWD23 MACWD22 MACWD21 MACWD20 MACWD19 MACWD18 MACWD17 MACWD16
Default
0 0 0 0 0 0 0 0
Bits 7 to 0: MAC Write Data 2 (MACWD23 to MACWD16). One of four bytes of data to be written to the MAC.
Data has been written after a write command has been issued and the
SU.MACRWC .MCS bit is zero.
Register Name:
SU.MACWD3
Register Description: MAC Write Data 3
Register Address: 149h
Bit
# 7 6 5 4 3 2 1 0
Name MACD31 MACD30 MACD29 MACD28 MACD27 MACD26 MACD25 MACD24
Default
0 0 0 0 0 0 0 0
Bits 7 to 0: MAC Write Data 3 (MACD31 to MACD24). One of four bytes of data to be written to the MAC. Data
has been written after a write command has been issued and the
SU.MACRWC .MCS bit is zero.
Register Name:
SU.MACAWL
Register Description: MAC Address Write Low
Register Address: 14Ah
Bit
# 7 6 5 4 3 2 1 0
Name MACAW 7 MACAW 6 MACAW 5 MACAW4 MACAW3 MACAW2 MACAW1 MACAW0
Default 0 0 0 0 0 0 0 0
Bits 7 to 0: MAC Write Address (MACAW7 to MACAW0). Low byte of the MAC address. Used only for write
operations.