NEC PD75402A - Manual (Page 84)

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CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS
(1) Serial operating mode register (CSIM)
CSIM is an 8-bit register which specifies the serial interface operating mode, serial clock, wake-up function, etc.
(See 5.5.3 (1) “Serial operating mode register” for details.)
(2) Serial bus interface control register (SBIC)
SBIC is an 8-bit register composed of bits which control the serial bus and flags which indicate various statuses
of the input data from the serial bus, and is mainly used in the SBI mode. (See 5.5.3 (2) “Serial bus interface control
register” for details.)
(3) Shift register (SIO)
The SIO register converts 8-bit serial data to parallel data and 8-bit parallel data to serial data. It performs
transmission/reception operations (shift operations) in synchronization with the serial clock. A serial transfer is
started by writing data to SIO. Actual transmission/reception operations are controlled by writes to the SIO. (See
5.5.3 (3) “Shift register” for details).
(4) SO latch
A latch which holds the SO/SB0 and SI pin levels. Can be directly controlled by software. Set at the end of the
8th SCK pulse in the SBI mode. (See 5.5.3 (2) “Serial bus interface control register” for details.)
(5) Serial clock selector
Selects the serial clock to be used.
(6) Serial clock counter
Counts the serial clock cycles output and input in a transmission/reception operation, and checks that 8-bit data
transmission/reception has been performed.
(7) Slave address register (SVA), address comparator
In SBI mode, this register is used when the
µ
PD75402A is used as a slave device. The slave sets its own
specification number (slave address value) in the SVA register. The master outputs a slave address to select a
specific slave.
The address comparator is used to compare the slave address received from the master with the SVA value: If
they match the relevant slave is determined to have been selected. (See 5.5.3 (4) “Slave address register” for details.)